This invention relates to differential input buffers having reduced power consumption. More particularly, this invention relates to a differential buffer whose bias current is gated by one of its associated signalsxe2x80x94i.e., by one of its inputs or outputs.
Differential buffers are well known. Like conventional buffers, they can increase the drive current for a signal, allowing it to be transmitted a longer distance, without amplificationxe2x80x94i.e., without changing its voltage waveform. The exception is that the signal ordinarily is inverted. The difference between a differential buffer and a conventional buffer is that in addition to the signal input, a differential buffer has a reference input. The output of the differential buffer, then, effectively is a reflection of the input signal about the reference voltage, rather than about ground. In other words, as the input signal goes high, the output signal goes low when the voltage of the input signal exceeds the reference voltage, rather than when the voltage of the input signal becomes positive. Similarly, as the input signal goes low, the output signal goes high when the voltage of the input signal goes below the reference voltage, rather than when the input signal becomes negative. These relationships hold whether the reference voltage is positive or negative.
A differential buffer requires a bias current, particularly to enable fast switching when the buffer output switches, to reduce propagation delays. However, most of the time, the output of a differential buffer is not switching, but remains in a steady state. Therefore, if a high enough bias current is provided all the time to enable fast switching when necessary, the differential buffer consumes additional power unnecessarily during steady state operation.
It would be desirable to be able to provide a differential buffer having reduced steady-state power consumption while maintaining fast switching times.
In a differential buffer according to the present invention, the bias current is gated by one or both of the input and output signals. Steady-state power consumption is reduced by keeping the bias current low except during switching of the input and/or output waveforms. In a preferred embodiment, a rising edge detector and a falling edge detector monitor both the input and output waveforms. As the input begins to change (either to rise from a low level or to fall from a high level), the bias current is increased until it is detected that the output has changed (either has risen from a low level or has fallen from a high level).
Thus, in accordance with the present invention, there is provided a differential buffer having a reference input to which a reference signal is applied, a signal input to which an input signal is applied, a signal output on which an output signal is provided as a function of the input signal relative to the reference signal, and a bias current input to which a bias current is applied. The buffer includes biasing circuitry having at least one bias control input, bias current generating circuitry that generates a bias current as a function of the at least one bias control input, and a bias current output on which the bias current is provided. The bias current output of the biasing circuitry is connected to the bias current input of the differential buffer; wherein one of the at least one bias control input is one of (a) the signal input, and (b) the signal output.